Base Package:
mingw-w64-yosys

Description:
A framework for RTL synthesis tools (mingw-w64)
Group(s):
mingw-w64-ucrt-x86_64-eda
Repo:
ucrt64
Homepage:
https://yosyshq.net/yosys
Repository:
https://github.com/YosysHQ/yosys
License(s):
ISC
Version:
0.38-1
External:
Anitya
yosys
Arch Linux
0.43
Repology
yosys

Installation:
pacman -S mingw-w64-ucrt-x86_64-yosys
File:
https://mirror.msys2.org/mingw/ucrt64/mingw-w64-ucrt-x86_64-yosys-0.38-1-any.pkg.tar.zst
SHA256:
02d6ff4c9b1f346ca59605a9b1ce6d7b7c2bff077a1e4d58d786ef37eae79224
Last Packager:
CI (msys2/msys2-autobuild/d4515ba2/7854341113)
Build Date:
2024-02-10 10:39:52
Package Size:
11.24 MB
Installed Size:
55.13 MB
Source-Only Tarball:
https://mirror.msys2.org/mingw/sources/mingw-w64-yosys-0.38-1.src.tar.zst

Dependencies:
Optional Dependencies:
-
Build Dependencies:
Check Dependencies:
Provides:
-
Conflicts:
-
Replaces:
-

Provided By:
-
Required By:
-

Files:
/ucrt64/bin/yosys-abc.exe
/ucrt64/bin/yosys-config
/ucrt64/bin/yosys-filterlib.exe
/ucrt64/bin/yosys-smtbmc-script.py
/ucrt64/bin/yosys-smtbmc.exe
/ucrt64/bin/yosys-witness-script.py
/ucrt64/bin/yosys-witness.exe
/ucrt64/bin/yosys.exe
/ucrt64/lib/yosys/libyosys_exe.a
/ucrt64/share/licenses/yosys/LICENSE
/ucrt64/share/yosys/abc9_map.v
/ucrt64/share/yosys/abc9_model.v
/ucrt64/share/yosys/abc9_unmap.v
/ucrt64/share/yosys/achronix/speedster22i/cells_map.v
/ucrt64/share/yosys/achronix/speedster22i/cells_sim.v
/ucrt64/share/yosys/adff2dff.v
/ucrt64/share/yosys/anlogic/arith_map.v
/ucrt64/share/yosys/anlogic/brams.txt
/ucrt64/share/yosys/anlogic/brams_map.v
/ucrt64/share/yosys/anlogic/cells_map.v
/ucrt64/share/yosys/anlogic/cells_sim.v
/ucrt64/share/yosys/anlogic/eagle_bb.v
/ucrt64/share/yosys/anlogic/lutrams.txt
/ucrt64/share/yosys/anlogic/lutrams_map.v
/ucrt64/share/yosys/cells.lib
/ucrt64/share/yosys/cmp2lcu.v
/ucrt64/share/yosys/cmp2lut.v
/ucrt64/share/yosys/cmp2softlogic.v
/ucrt64/share/yosys/coolrunner2/cells_counter_map.v
/ucrt64/share/yosys/coolrunner2/cells_latch.v
/ucrt64/share/yosys/coolrunner2/cells_sim.v
/ucrt64/share/yosys/coolrunner2/tff_extract.v
/ucrt64/share/yosys/coolrunner2/xc2_dff.lib
/ucrt64/share/yosys/dff2ff.v
/ucrt64/share/yosys/ecp5/arith_map.v
/ucrt64/share/yosys/ecp5/brams.txt
/ucrt64/share/yosys/ecp5/brams_map.v
/ucrt64/share/yosys/ecp5/cells_bb.v
/ucrt64/share/yosys/ecp5/cells_ff.vh
/ucrt64/share/yosys/ecp5/cells_io.vh
/ucrt64/share/yosys/ecp5/cells_map.v
/ucrt64/share/yosys/ecp5/cells_sim.v
/ucrt64/share/yosys/ecp5/dsp_map.v
/ucrt64/share/yosys/ecp5/latches_map.v
/ucrt64/share/yosys/ecp5/lutrams.txt
/ucrt64/share/yosys/ecp5/lutrams_map.v
/ucrt64/share/yosys/efinix/arith_map.v
/ucrt64/share/yosys/efinix/brams.txt
/ucrt64/share/yosys/efinix/brams_map.v
/ucrt64/share/yosys/efinix/cells_map.v
/ucrt64/share/yosys/efinix/cells_sim.v
/ucrt64/share/yosys/efinix/gbuf_map.v
/ucrt64/share/yosys/fabulous/arith_map.v
/ucrt64/share/yosys/fabulous/cells_map.v
/ucrt64/share/yosys/fabulous/ff_map.v
/ucrt64/share/yosys/fabulous/io_map.v
/ucrt64/share/yosys/fabulous/latches_map.v
/ucrt64/share/yosys/fabulous/prims.v
/ucrt64/share/yosys/fabulous/ram_regfile.txt
/ucrt64/share/yosys/fabulous/regfile_map.v
/ucrt64/share/yosys/gate2lut.v
/ucrt64/share/yosys/gatemate/arith_map.v
/ucrt64/share/yosys/gatemate/brams.txt
/ucrt64/share/yosys/gatemate/brams_init_20.vh
/ucrt64/share/yosys/gatemate/brams_init_40.vh
/ucrt64/share/yosys/gatemate/brams_map.v
/ucrt64/share/yosys/gatemate/cells_bb.v
/ucrt64/share/yosys/gatemate/cells_sim.v
/ucrt64/share/yosys/gatemate/inv_map.v
/ucrt64/share/yosys/gatemate/lut_map.v
/ucrt64/share/yosys/gatemate/lut_tree_cells.genlib
/ucrt64/share/yosys/gatemate/lut_tree_map.v
/ucrt64/share/yosys/gatemate/mul_map.v
/ucrt64/share/yosys/gatemate/mux_map.v
/ucrt64/share/yosys/gatemate/reg_map.v
/ucrt64/share/yosys/gowin/arith_map.v
/ucrt64/share/yosys/gowin/brams.txt
/ucrt64/share/yosys/gowin/brams_map.v
/ucrt64/share/yosys/gowin/cells_map.v
/ucrt64/share/yosys/gowin/cells_sim.v
/ucrt64/share/yosys/gowin/cells_xtra.v
/ucrt64/share/yosys/gowin/lutrams.txt
/ucrt64/share/yosys/gowin/lutrams_map.v
/ucrt64/share/yosys/greenpak4/cells_blackbox.v
/ucrt64/share/yosys/greenpak4/cells_latch.v
/ucrt64/share/yosys/greenpak4/cells_map.v
/ucrt64/share/yosys/greenpak4/cells_sim.v
/ucrt64/share/yosys/greenpak4/cells_sim_ams.v
/ucrt64/share/yosys/greenpak4/cells_sim_digital.v
/ucrt64/share/yosys/greenpak4/cells_sim_wip.v
/ucrt64/share/yosys/greenpak4/gp_dff.lib
/ucrt64/share/yosys/ice40/abc9_model.v
/ucrt64/share/yosys/ice40/arith_map.v
/ucrt64/share/yosys/ice40/brams.txt
/ucrt64/share/yosys/ice40/brams_map.v
/ucrt64/share/yosys/ice40/cells_map.v
/ucrt64/share/yosys/ice40/cells_sim.v
/ucrt64/share/yosys/ice40/dsp_map.v
/ucrt64/share/yosys/ice40/ff_map.v
/ucrt64/share/yosys/ice40/latches_map.v
/ucrt64/share/yosys/ice40/spram.txt
/ucrt64/share/yosys/ice40/spram_map.v
/ucrt64/share/yosys/include/backends/cxxrtl/runtime/cxxrtl/capi/cxxrtl_capi.cc
/ucrt64/share/yosys/include/backends/cxxrtl/runtime/cxxrtl/capi/cxxrtl_capi.h
/ucrt64/share/yosys/include/backends/cxxrtl/runtime/cxxrtl/capi/cxxrtl_capi_vcd.cc
/ucrt64/share/yosys/include/backends/cxxrtl/runtime/cxxrtl/capi/cxxrtl_capi_vcd.h
/ucrt64/share/yosys/include/backends/cxxrtl/runtime/cxxrtl/cxxrtl.h
/ucrt64/share/yosys/include/backends/cxxrtl/runtime/cxxrtl/cxxrtl_vcd.h
/ucrt64/share/yosys/include/backends/rtlil/rtlil_backend.h
/ucrt64/share/yosys/include/frontends/ast/ast.h
/ucrt64/share/yosys/include/frontends/ast/ast_binding.h
/ucrt64/share/yosys/include/frontends/blif/blifparse.h
/ucrt64/share/yosys/include/kernel/binding.h
/ucrt64/share/yosys/include/kernel/cellaigs.h
/ucrt64/share/yosys/include/kernel/celledges.h
/ucrt64/share/yosys/include/kernel/celltypes.h
/ucrt64/share/yosys/include/kernel/consteval.h
/ucrt64/share/yosys/include/kernel/constids.inc
/ucrt64/share/yosys/include/kernel/cost.h
/ucrt64/share/yosys/include/kernel/ff.h
/ucrt64/share/yosys/include/kernel/ffinit.h
/ucrt64/share/yosys/include/kernel/ffmerge.h
/ucrt64/share/yosys/include/kernel/fmt.h
/ucrt64/share/yosys/include/kernel/fstdata.h
/ucrt64/share/yosys/include/kernel/hashlib.h
/ucrt64/share/yosys/include/kernel/json.h
/ucrt64/share/yosys/include/kernel/log.h
/ucrt64/share/yosys/include/kernel/macc.h
/ucrt64/share/yosys/include/kernel/mem.h
/ucrt64/share/yosys/include/kernel/modtools.h
/ucrt64/share/yosys/include/kernel/qcsat.h
/ucrt64/share/yosys/include/kernel/register.h
/ucrt64/share/yosys/include/kernel/rtlil.h
/ucrt64/share/yosys/include/kernel/satgen.h
/ucrt64/share/yosys/include/kernel/sigtools.h
/ucrt64/share/yosys/include/kernel/timinginfo.h
/ucrt64/share/yosys/include/kernel/utils.h
/ucrt64/share/yosys/include/kernel/yosys.h
/ucrt64/share/yosys/include/kernel/yw.h
/ucrt64/share/yosys/include/libs/ezsat/ezminisat.h
/ucrt64/share/yosys/include/libs/ezsat/ezsat.h
/ucrt64/share/yosys/include/libs/fst/fstapi.h
/ucrt64/share/yosys/include/libs/json11/json11.hpp
/ucrt64/share/yosys/include/libs/sha1/sha1.h
/ucrt64/share/yosys/include/passes/fsm/fsmdata.h
/ucrt64/share/yosys/intel/common/altpll_bb.v
/ucrt64/share/yosys/intel/common/brams_m9k.txt
/ucrt64/share/yosys/intel/common/brams_map_m9k.v
/ucrt64/share/yosys/intel/common/ff_map.v
/ucrt64/share/yosys/intel/common/m9k_bb.v
/ucrt64/share/yosys/intel/cyclone10lp/cells_map.v
/ucrt64/share/yosys/intel/cyclone10lp/cells_sim.v
/ucrt64/share/yosys/intel/cycloneiv/cells_map.v
/ucrt64/share/yosys/intel/cycloneiv/cells_sim.v
/ucrt64/share/yosys/intel/cycloneive/cells_map.v
/ucrt64/share/yosys/intel/cycloneive/cells_sim.v
/ucrt64/share/yosys/intel/max10/cells_map.v
/ucrt64/share/yosys/intel/max10/cells_sim.v
/ucrt64/share/yosys/intel_alm/common/abc9_map.v
/ucrt64/share/yosys/intel_alm/common/abc9_model.v
/ucrt64/share/yosys/intel_alm/common/abc9_unmap.v
/ucrt64/share/yosys/intel_alm/common/alm_map.v
/ucrt64/share/yosys/intel_alm/common/alm_sim.v
/ucrt64/share/yosys/intel_alm/common/arith_alm_map.v
/ucrt64/share/yosys/intel_alm/common/bram_m10k.txt
/ucrt64/share/yosys/intel_alm/common/bram_m10k_map.v
/ucrt64/share/yosys/intel_alm/common/bram_m20k.txt
/ucrt64/share/yosys/intel_alm/common/bram_m20k_map.v
/ucrt64/share/yosys/intel_alm/common/dff_map.v
/ucrt64/share/yosys/intel_alm/common/dff_sim.v
/ucrt64/share/yosys/intel_alm/common/dsp_map.v
/ucrt64/share/yosys/intel_alm/common/dsp_sim.v
/ucrt64/share/yosys/intel_alm/common/lutram_mlab.txt
/ucrt64/share/yosys/intel_alm/common/megafunction_bb.v
/ucrt64/share/yosys/intel_alm/common/mem_sim.v
/ucrt64/share/yosys/intel_alm/common/misc_sim.v
/ucrt64/share/yosys/intel_alm/common/quartus_rename.v
/ucrt64/share/yosys/intel_alm/cyclonev/cells_sim.v
/ucrt64/share/yosys/lattice/arith_map_ccu2c.v
/ucrt64/share/yosys/lattice/arith_map_ccu2d.v
/ucrt64/share/yosys/lattice/brams_16kd.txt
/ucrt64/share/yosys/lattice/brams_8kc.txt
/ucrt64/share/yosys/lattice/brams_map_16kd.v
/ucrt64/share/yosys/lattice/brams_map_8kc.v
/ucrt64/share/yosys/lattice/ccu2c_sim.vh
/ucrt64/share/yosys/lattice/ccu2d_sim.vh
/ucrt64/share/yosys/lattice/cells_bb_ecp5.v
/ucrt64/share/yosys/lattice/cells_bb_xo2.v
/ucrt64/share/yosys/lattice/cells_bb_xo3.v
/ucrt64/share/yosys/lattice/cells_bb_xo3d.v
/ucrt64/share/yosys/lattice/cells_ff.vh
/ucrt64/share/yosys/lattice/cells_io.vh
/ucrt64/share/yosys/lattice/cells_map.v
/ucrt64/share/yosys/lattice/cells_sim_ecp5.v
/ucrt64/share/yosys/lattice/cells_sim_xo2.v
/ucrt64/share/yosys/lattice/cells_sim_xo3.v
/ucrt64/share/yosys/lattice/cells_sim_xo3d.v
/ucrt64/share/yosys/lattice/common_sim.vh
/ucrt64/share/yosys/lattice/dsp_map_18x18.v
/ucrt64/share/yosys/lattice/latches_map.v
/ucrt64/share/yosys/lattice/lutrams.txt
/ucrt64/share/yosys/lattice/lutrams_map.v
/ucrt64/share/yosys/mul2dsp.v
/ucrt64/share/yosys/nexus/arith_map.v
/ucrt64/share/yosys/nexus/brams.txt
/ucrt64/share/yosys/nexus/brams_map.v
/ucrt64/share/yosys/nexus/cells_map.v
/ucrt64/share/yosys/nexus/cells_sim.v
/ucrt64/share/yosys/nexus/cells_xtra.v
/ucrt64/share/yosys/nexus/dsp_map.v
/ucrt64/share/yosys/nexus/latches_map.v
/ucrt64/share/yosys/nexus/lrams.txt
/ucrt64/share/yosys/nexus/lrams_map.v
/ucrt64/share/yosys/nexus/lutrams.txt
/ucrt64/share/yosys/nexus/lutrams_map.v
/ucrt64/share/yosys/nexus/parse_init.vh
/ucrt64/share/yosys/pmux2mux.v
/ucrt64/share/yosys/python3/smtio.py
/ucrt64/share/yosys/python3/ywio.py
/ucrt64/share/yosys/quicklogic/common/cells_sim.v
/ucrt64/share/yosys/quicklogic/pp3/abc9_map.v
/ucrt64/share/yosys/quicklogic/pp3/abc9_model.v
/ucrt64/share/yosys/quicklogic/pp3/abc9_unmap.v
/ucrt64/share/yosys/quicklogic/pp3/cells_map.v
/ucrt64/share/yosys/quicklogic/pp3/cells_sim.v
/ucrt64/share/yosys/quicklogic/pp3/ffs_map.v
/ucrt64/share/yosys/quicklogic/pp3/latches_map.v
/ucrt64/share/yosys/quicklogic/pp3/lut_map.v
/ucrt64/share/yosys/quicklogic/qlf_k6n10f/TDP18K_FIFO.v
/ucrt64/share/yosys/quicklogic/qlf_k6n10f/arith_map.v
/ucrt64/share/yosys/quicklogic/qlf_k6n10f/bram_types_sim.v
/ucrt64/share/yosys/quicklogic/qlf_k6n10f/brams_map.v
/ucrt64/share/yosys/quicklogic/qlf_k6n10f/brams_sim.v
/ucrt64/share/yosys/quicklogic/qlf_k6n10f/cells_sim.v
/ucrt64/share/yosys/quicklogic/qlf_k6n10f/dsp_final_map.v
/ucrt64/share/yosys/quicklogic/qlf_k6n10f/dsp_map.v
/ucrt64/share/yosys/quicklogic/qlf_k6n10f/dsp_sim.v
/ucrt64/share/yosys/quicklogic/qlf_k6n10f/ffs_map.v
/ucrt64/share/yosys/quicklogic/qlf_k6n10f/libmap_brams.txt
/ucrt64/share/yosys/quicklogic/qlf_k6n10f/libmap_brams_map.v
/ucrt64/share/yosys/quicklogic/qlf_k6n10f/sram1024x18_mem.v
/ucrt64/share/yosys/quicklogic/qlf_k6n10f/ufifo_ctl.v
/ucrt64/share/yosys/sf2/arith_map.v
/ucrt64/share/yosys/sf2/cells_map.v
/ucrt64/share/yosys/sf2/cells_sim.v
/ucrt64/share/yosys/simcells.v
/ucrt64/share/yosys/simlib.v
/ucrt64/share/yosys/smtmap.v
/ucrt64/share/yosys/techmap.v
/ucrt64/share/yosys/xilinx/abc9_model.v
/ucrt64/share/yosys/xilinx/arith_map.v
/ucrt64/share/yosys/xilinx/brams_defs.vh
/ucrt64/share/yosys/xilinx/brams_xc2v.txt
/ucrt64/share/yosys/xilinx/brams_xc2v_map.v
/ucrt64/share/yosys/xilinx/brams_xc3sda.txt
/ucrt64/share/yosys/xilinx/brams_xc3sda_map.v
/ucrt64/share/yosys/xilinx/brams_xc4v.txt
/ucrt64/share/yosys/xilinx/brams_xc4v_map.v
/ucrt64/share/yosys/xilinx/brams_xc5v_map.v
/ucrt64/share/yosys/xilinx/brams_xc6v_map.v
/ucrt64/share/yosys/xilinx/brams_xcu_map.v
/ucrt64/share/yosys/xilinx/brams_xcv.txt
/ucrt64/share/yosys/xilinx/brams_xcv_map.v
/ucrt64/share/yosys/xilinx/cells_map.v
/ucrt64/share/yosys/xilinx/cells_sim.v
/ucrt64/share/yosys/xilinx/cells_xtra.v
/ucrt64/share/yosys/xilinx/ff_map.v
/ucrt64/share/yosys/xilinx/lut_map.v
/ucrt64/share/yosys/xilinx/lutrams_xc5v.txt
/ucrt64/share/yosys/xilinx/lutrams_xc5v_map.v
/ucrt64/share/yosys/xilinx/lutrams_xcu.txt
/ucrt64/share/yosys/xilinx/lutrams_xcv.txt
/ucrt64/share/yosys/xilinx/lutrams_xcv_map.v
/ucrt64/share/yosys/xilinx/mux_map.v
/ucrt64/share/yosys/xilinx/urams.txt
/ucrt64/share/yosys/xilinx/urams_map.v
/ucrt64/share/yosys/xilinx/xc3s_mult_map.v
/ucrt64/share/yosys/xilinx/xc3sda_dsp_map.v
/ucrt64/share/yosys/xilinx/xc4v_dsp_map.v
/ucrt64/share/yosys/xilinx/xc5v_dsp_map.v
/ucrt64/share/yosys/xilinx/xc6s_dsp_map.v
/ucrt64/share/yosys/xilinx/xc7_dsp_map.v
/ucrt64/share/yosys/xilinx/xcu_dsp_map.v
Last Update: 2024-10-13 01:48:09 [Request update]